Manikanta Maryala

Formal Verification Engineer at SeviTech Systems Pvt. Ltd.

Manikanta Maryala is currently serving as an LEC - CLP CAD Engineer at LeadSoc Technologies Pvt Ltd since November 2023. Prior to this role, Manikanta worked as a Formal Verification Engineer at SeviTech Systems Pvt. Ltd. from February 2019 to November 2023 and as a Physical Design Engineer at Graphene Semiconductor Services Pvt Ltd. from December 2017 to December 2018. Manikanta holds a B.Tech degree in Electronics and Communication Engineering from TKR College of Engineering & Technology, along with an Intermediate degree from AP Residential Junior College Nagarjunasagar and a 10th class education from AP Residential School Thungathurthy.

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