Gopinath Thiyagarajan is a highly experienced engineer with a focus on verification in the semiconductor industry. Currently serving as Senior Staff Engr II at SiFive since August 2019, Gopinath leads verification efforts for advanced dual cluster systems, ensuring the quality of un-core components and achieving critical coverage milestones. Previous roles include significant contributions at Rambus, where Gopinath led DDR4 and DDR5 RCD verification and developed test bench infrastructure, and at Masamb Electronics Systems, where responsibility included emulation VIP development and team training in verification methodologies. Gopinath also gained foundational experience at Arasan Chip Systems Inc. as a verification engineer. Gopinath holds a Bachelor of Engineering in Electronics and Communication Engineering from Anna University.