Janice Hsieh is an experienced application technology manager currently working at Siltronic AG since July 2010. Prior to this role, Janice served as the quality section manager at 瑞晶電子 Rexchip from July 2006 to June 2009, focusing on raw material supplier quality management. Janice's background includes working as a senior process integration engineer at 台積電 from August 2003 to August 2004, and as a process integration engineer at 矽統科技 (SiS) from February 2001 to May 2003. Earlier experience includes a position as a process engineer at 中華映管股份有限公司 from August 1999 to January 2001, specializing in MgO film processes and equipment in the flat-panel display development department. Janice Hsieh holds an Executive MBA in Business Administration from Aalto University (2021-2023), a Master's degree in Materials Science and Engineering from National Chiao Tung University (1997-1999), and a Bachelor's degree in Polymer Materials Engineering from National Taiwan University of Science and Technology (1995-1997).
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