Jaydeep H. Padariya

Jaydeep H. Padariya has held a variety of roles across a range of companies. Starting in 2015, they were a Trainee at eiTRA - eInfochips Training & Research Academy Ltd. Jaydeep then moved to eInfochips in the same year, where they were an ASIC DFT Engineer working on Pattern generation activity for Networking chips. In 2017, they joined Qualcomm as an Engineer and then was promoted to Senior Engineer. In 2020, they moved to Texas Instruments as a Digital Design Engineer. Most recently, in 2022, they joined SiMa.ai as a Sr. Staff DFT Engineer, where they are responsible for delivering the industry's first software-centric purpose-built MLSoC platform.

Jaydeep H. Padariya received a Bachelor of Technology (B.Tech.) in Electronics and Communications Engineering from CHAROTAR UNIVERSITY OF SCIENCE AND TECHNOLOGY between 2011 and 2015. Prior to that, they completed their H.S.C. from D.R.Tarapra Higher Secondary School between 2009 and 2011. Jaydeep has also obtained certifications from IEEE, Techfest, IIT Bombay, and Vaividhya'14 for AVR Microcontroller and Embedded C (Workshop), Maze Solving Robot, Grid Warrior Challenge, and Winner in Poster Presentation respectively.