Sony
Erez Masandilov is a Senior VLSI Design Engineer at Sony, a position held since May 2024. Prior to this role, Erez worked as an ASIC Design Engineer at CaPow Technologies Ltd. from December 2020 to May 2024. Erez holds a Master of Science (M.Sc) degree in Electrical and Electronics Engineering from Ben-Gurion University of the Negev, attended from September 2018 to March 2021.
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