Yotam Antebi

Yotam Antebi has extensive experience in VLSI design, starting in 2008 at Inomize, where they participated in the design of various ASICs, including RF/PLC multi-standard Modems and communication controllers. Yotam also worked on design and verification stages of IPs/HW blocks for different applications.

In 2009, they joined DesignArt Networks, where they contributed to the design of multi-standard, multi-core, single chip solution ASICs for 3G/4G Base Station platforms.

In 2010, Yotam worked at Intel Corporation, participating in the design of a cable Modem ASIC, focusing on integration and verification of the MAC layer.

From 2011 to 2012, they worked at Broadcom as a VLSI Design Engineer.

In 2013, Yotam joined Qualcomm as a VLSI Design Engineer, working on the design stages of a 4G-LTE, multi-core IP for a residential base station ASIC. Yotam was responsible for defining and implementing bus security control and AMBA3.

Yotam then worked at Valens from 2014 to 2020 as a VLSI Design Lead, contributing to the design and development of VLSI projects.

Currently, they hold the position of VLSI Design Lead at Speedata.io since 2020.

From 2000 to 2004, Yotam Antebi studied at the Holon Institute of Technology. During this time, they obtained a Bachelor of Science degree in Electronics, with a focus on VLSI (Very Large-Scale Integration) and Electricity.