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Chong Tsen Lee

Design Verification Engineer at StarFive Technology Co., Ltd.

Chong Tsen Lee is a Design Verification Engineer at StarFive Technology Co., Ltd. since July 2021, specializing in SoC IP and full-chip level verification. Responsibilities include developing verification plans, creating testbenches using SystemVerilog, UVM, and System C, and performing coverage-driven and formal verification. Prior experience includes a role as a SoC Front End Design Engineer at Intel Corporation, focusing on SoC development and logic design, and an internship at ABB assisting in engineering documentation and testing. Chong also held leadership positions at the University of Malaya, serving as Treasurer for the EDMAT project and President of the Penang Undergraduates Society. Education includes a Bachelor of Engineering in Electrical and Electronics Engineering from the University of Malaya and a summer exchange program in Business/Managerial Economics at Asia University.

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