Arpit Agrawal is a Layout Design Staff Engineer at Synopsys, having transitioned from a Design Engineer role at Zia Semiconductor Pvt Ltd, where they worked from 2019 to 2024. Prior to that, they served as a Senior Layout Designer at Tech Mahindra Cerium Pvt Ltd in 2024 and were a Physical Design Engineer Trainee at RV-VLSI VLSI and Embedded Systems Design Center from 2018 to 2019. Arpit completed their high school education in Science at Saraswati Vidya Mandir Hamirpur and earned a 12th grade certificate in Science from Pt. Deen Dayal Upadhyaya Sanatan Dharm Vidyalaya Kanpur.
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