Bala Chandru

Bala Chandru is a Senior AMS Layout Design Engineer at Synopsys, where they apply their expertise in analog layout design for advanced technologies including 2nm, 3nm, 16nm, 22nm, 40nm, and 55nm processes. With a strong foundation in tools such as Cadence Virtuoso L & XL, as well as PVS and Caliber, Bala has developed solid skills in various aspects of IC fabrication, including matching, shielding, and layout debugging. Prior to Synopsys, Bala held positions at Excelmax Technologies and Nanolitho Technologies Private Limited, where they honed their skills as an Analog Layout Engineer. They earned a Bachelor of Engineering in Instrumentation and Control from Sri Krishna College of Technology, following their earlier education at BMC Matric Higher Secondary School.