Bharti Singla is currently an ASIC Digital Design Engineer Sr II at Synopsys Inc, where they are involved in new feature enhancements and team leadership. From 2019 to 2023, they worked as an ASIC Digital Design Engineer Sr I, focusing on USB 3.2 IP controller verification. Prior to that, Bharti gained valuable experience as a Design Engineer II at Wafer Space and as a VLSI Project Engineer at Wipro, where they contributed to various verification projects. Bharti holds a Master of Technology in Microelectronics from Birla Institute of Technology and Science, Pilani, and a Bachelor's degree in Electronics and Communication from Chitkara University.
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