Inês Caupers is a Staff A&MS Layout Design Engineer at Synopsys, where they work on high-speed SerDes PHY projects utilizing advanced semiconductor technologies. Previously, they held the position of Senior R&D Process Engineer at ams OSRAM, focusing on new process development and integration of lithography systems. Their earlier roles include Metrology and Failure Analysis Engineer, where they enhanced production yield for optical products, and Fraud Prevention Trainee at SIBS, where they developed data-driven models to improve fraud prevention strategies. Inês holds a Master of Engineering and a Bachelor of Engineering in Nanotechnology from the Faculdade de Ciências e Tecnologia da Universidade Nova de Lisboa.
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