Nguyen Long

Nguyen Long is a Senior Engineer in SOC Engineering at Synopsys Inc, starting in October 2024. Previously, Nguyen worked as a Logic Design Engineer at Uniquify Inc from 2022 to September 2024, focusing on FPGA, design verification, and various industry-standard protocols including APB, AXI, UART, DDR, LPDDR, and HDMI. Additional expertise includes Verilog, System Verilog, UVM, and verification IP development and integration. Earlier experience includes a Logic Design Internship where Nguyen conducted research on clock domain crossing, clock gating, and power gating, alongside a project involving Frame Rate Control IP. Nguyen holds an Engineer's degree in Electrical and Electronics Engineering from Ho Chi Minh City University of Technology, completed in January 2023, and attended Luong The Vinh High School for the Gifted from August 2015 to July 2018.