Sandeep Bondada

Sandeep Bondada is an experienced IP/SOC Verification Engineer currently working at Synopsys Inc as a Senior ASIC Digital Design Engineer since 2022. They previously held positions at Intel Corporation as a Pre-Si Verification Engineer, and at AMD as a contractor. Sandeep started their career with internships at Xilinx and has worked in various engineering roles across multiple companies, gaining expertise in SOC designs and IO logic generation. They hold an Advanced Diploma in ASIC Design from RV VLSI Design Center and Master's and Bachelor's degrees in VLSI Design and Electronics and Communication Engineering, respectively, from Jawaharlal Nehru Technological University.