Vittal Talawar is currently a Staff Engineer in Layout Design at Synopsys India, specializing in standard cell layouts for advanced technology nodes including TSMC and Samsung processes. Previously, Vittal worked at Qualcomm India Pvt. Ltd. and INVECAS, gaining extensive experience in digital layout design and verification flows. Vittal holds a Diploma in Electrical and Telecommunication from the Institution of Electronics and Telecommunication Engineers and has completed VLSI training at KarMic Microelectronic Training and Research Center. Notably, Vittal received recognition as the "Youngest IC Design Engineer in the world" from Karmic after three years of training in VLSI.
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