Juan Alfonso Serrano Viseas

Analog Design Engineer at Teledyne e2v

Juan Serrano is an experienced Analog Design Engineer at Teledyne e2v since March 2022, specializing in the design of various analog blocks including OTAs, comparators, ADCs, and bias circuits. Previously, as a Scientific Researcher at LIRMM, Juan focused on training neural networks for predicting fish body variables using bioimpedance data. Juan's research background includes a PhD at Instituto de Microelectrónica de Sevilla IMSE-CNM, where the focus was on measuring biomedical variables via electronic oscillators, complemented by earlier work at Universidad de Sevilla on electric vehicle traffic optimization. Academic qualifications include a PhD in Micro/Nano Electronics from Universidad de Sevilla, a Master's in Automation, Robotics, and Telematics, and a Bachelor’s in Industrial Electronics and Automation from Universidad de Extremadura.

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