Satyappa Khot

Satyappa Khot is a Senior Analog Design Engineer at Tessolve, with experience dating back to August 2018. Satyappa has previously held the position of Design Engineer at Velankani Electronics from May 2017 to July 2018. Satyappa possesses expertise in analog circuit design, including reference circuit design, comparator design, DC-DC converter architecture, knee point detection, and voltage and current sensing techniques in DC-DC converters. Satyappa completed a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from Visvesvaraya Technological University between 2005 and 2009, followed by a Master of Technology in VLSI Design and Embedded Systems from KLE Engineering College, Belgaum.