Victor Besyakov

Design Verification Team Lead at Untether AI

Victor Besyakov has worked in the tech industry since 1989. Victor'sexperience includes roles such as Electronic Engineer at RADA Electronic Industries, Simulation Engineer (ASIC) at Telrad Networks, ASIC Verification Manager at Integrated Device Technology, Staff Engineer/Principal Design Verification Engineer at Qualcomm Atheros/Atheros Canada Corp, SMTS (ASIC Design Verification) at AMD, ASIC Design Verification (contract) at Ciena and BTA Design Services Inc., and Owner at IC Verimeter. Most recently, they have been the Design Verification Team Lead at Untether AI since 2021.

Victor Besyakov attended Samara State Technical University from 1975 to 1981, where they obtained a Ms degree in Electrical engineering.

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