Yakov Ziskis

Sr. CAD engineer at Valens Semiconductor

Yakov Ziskis has a strong background in CAD engineering, with experience spanning over two decades. Yakov most recently worked at Valens as a Senior CAD Engineer starting in October 2018. Prior to this, Yakov worked at Mellanox Technologies as a Senior CAD/DA Engineer from January 2013 to September 2018. Before Mellanox Technologies, Yakov was a CAD Engineer at DSP Group from November 2009 to January 2013. Yakov'scareer in CAD engineering began at Freescale Semiconductor, where they worked as a CAD Engineer from July 2000 to April 2009.

Yakov Ziskis obtained their Master of Technology (M.Tech.) degree from Donbas State Mechanical Engineering Academy during the period of 1990 to 1995. Following this, they pursued their studies at Netanya ORT Hermelin College from 1998 to 2000, where they focused on Programming Engineering. No specific field of study is mentioned for either of these educational experiences.

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