Yaniv Saado

Yaniv Saado is a seasoned design engineer with extensive experience in semiconductor and digital design, currently employed at Valens Semiconductor since May 2011. Prior positions include FPGA design and verification engineer at Alvarion from September 2009 to May 2011, and ASIC/FPGA designer at Broadlight from April 2006 to February 2009, during which participation in three GPON projects was notable. Additional experience includes verification work at Ace Verification in 2009 and an ASIC engineer role at ZORAN from January 2004 to April 2006, contributing to multimedia product projects for cellular phones from definition to tape-out. Yaniv Saado obtained a BSc in Electronic Engineering from Ben-Gurion University of the Negev between 1999 and 2003.