Mohit Chawla

Prinicpal Engineer at Verana Networks

Mohit Chawla has worked for a variety of companies since 2011, beginning with Three D Integrated Solutions Ltd as a Software Engineer Trainee. Mohit then moved to India Bulls Technology Solutions Limited as a DSP Engineer, where they worked on DSP algorithms for speech processing and studied requirement specifications, LLD design and coding, and unit testing. In 2013, they joined Azcom Technology as a Senior Technical Lead DSP Engineer, Technical Lead DSP Firmware Engineer, Senior DSP LTE Firmware Engineer, and DSP LTE Firmware Engineer. In 2020, they became a Senior AI/ML Speech Scientist at Ernie Inc, where they developed speech recognition algorithms in Kaldi, Pytorch-kaldi, and sequential E2E models. Finally, in 2021, they joined STL - Sterlite Technologies Limited as a 5G NR Physical Layer Architect and is currently working as a Principal Engineer for Verana Networks.

Mohit Chawla completed their high school education from Kulachi Hansraj Model School in 2006, obtaining a degree in Science. Mohit then went on to pursue a Bachelor of Technology - BTech in Electrical, Electronics and Communications Engineering from Ambedkar Institute of Advanced Communication Technologies and Research, graduating in 2011. Most recently, Mohit Chawla completed a Master's degree in Artificial Intelligence/Machine Learning from Purdue University in 2021.

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Timeline

  • Prinicpal Engineer

    November, 2022 - present