Alex Bespalchik

Alex Bespalchik has extensive experience in the field of hardware verification engineering. From 1999 to 2001, they worked at Vyyo as a Hardware Verification Engineer, responsible for checking modules of Wireless Modem design. They wrote Verification Environments in VHDL and Specman/E, as well as Test Plans for the design. From 2002 to 2013, they were a Hardware Verification Engineer at ECI Telecom, where they performed block and chip level verification in a Specman verification environment. They also wrote detailed Test Plans and were responsible for defining and writing coverage. Since 2014, they have been working as a Verification Engineer at Veriest, where they have worked on various projects for companies such as CEVA, MultiPhy, Valens, Marvell, MagicLeap, and Western Digital. In their current role, they have verified Data Memory Sub System, PIF Fabric, USB over HDBT, GPIOs, Power, and Memory Resource Server. They have also written Test Plans, Scoreboards, and Coverage using Specman and SV UVM.

Alex Bespalchik completed their education in Mechanical Engineering from Kryvyi Rih Technical University. Alex obtained a Bachelor of Science (BSc) and Master of Science (MSc) degree in the field, graduating between the years 1987 to 1995.