Syamala Nanditha Vittanala

Syamala Nanditha Vittanala is a skilled System Engineer IV at Verisign since July 2019, having advanced from System Engineer II through System Engineer III. Prior experience includes a role as a Graduate Research Assistant at The University of Southern Mississippi from May 2018 to May 2019, where a paper on 'Team Learning from Human Demonstration with Coordination Confidence' was submitted for publication, and research was conducted on improving bootstrapping algorithms for reinforcement learner agents. Additionally, Syamala worked as a Technology Analyst at ZS Associates from December 2015 to December 2017, collaborating with clients on product delivery and providing support for web applications. Educational qualifications include a Master of Science in Computer Science from The University of Southern Mississippi (2018-2019) and a Bachelor of Engineering in Computer Science from Osmania University (2011-2015).