Stuart Smith

Stuart Smith has been an FPGA Engineer at VividQ since 2022. Prior to that, they were a Project Engineer at MECALC from 2010 to 2022. Before that, they were a Teaching Assistant at the University of Pretoria from 2007 to 2010.

Stuart Smith attended the University of Pretoria/Universiteit van Pretoria from 2003 to 2010, during which time they achieved a BEng in Electronic Engineering in 2006, a BEng (Hons) in Bioengineering in 2007, and an MEng in Bioengineering in 2010.