Tejaswini Shelar

Packet Core Engg. at Vodafone Idea Limited

Tejaswini Shelar currently serves as a Packet Core Engineer at Vodafone Idea Limited since July 2021, transitioning from a role as a Graduate Engineering Trainee. Prior experience includes a winter internship at ASHIDA Electronics in December 2019 and work on CPLD/FPGA applications at K J Somaiya College of Engineering from June to July 2019. Tejaswini obtained a Bachelor of Technology in Electronics Engineering from K J Somaiya College of Engineering in 2021 and previously earned a Diploma in Electronic Engineering from Government Polytechnic Mumbai between 2015 and 2018. Education was completed with an S.S.C from I.E.S Navi Mumbai High School, Vashi.

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