Amit Iosefsohn is a Design Verification Engineer with extensive experience in advanced test benches using SystemVerilog UVM and VHDL-based environments. Amit has held positions at prominent companies, including Apple and Wiliot since April 2018, and previously at Elbit Systems Ltd from June 2013 to March 2018. Prior to these roles, Amit gained foundational experience in board design and FPGA design as a student at Rafael Advanced Defense Systems from March 2011 to May 2013. Amit holds a degree from Technion - Israel Institute of Technology, earned between 2009 and 2013.
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