Ian W.

Ian W. has worked in the field of hardware engineering since 1990. Ian started their career at Smiths Industries Aerospace as a Senior Hardware Engineer, where they designed an FPGA to interface a graphics system to an LCD display (VHDL). In 1998, they joined Sony as a Senior ASIC Engineer and worked on design, verification and implementation of ASICs for digital televisions and set top boxes. Ian's role later evolved to include lead implementation engineer with sole responsibility for synthesis, DFT, STA, ATPG and test pattern verification. Ian also designed and verified a clock and reset generator block for a CAM controller ASIC (Verilog). In 2008, they moved to Ericsson Mobile Platforms as a Staff Engineer and worked on SoC integration of digital baseband ASICs. From 2009 to 2012, they worked at ST-Ericsson as a Staff Engineer, where they were responsible for ATPG and test pattern verification. Ian then worked at Aptina as a Staff Engineer, producing scan test patterns (stuck-at and transition) including development and scripting of the ATPG flow using Mentor Tessent. In 2016, they joined Imagination Technologies as an ASIC Verification Engineer (Contractor). Ian then moved to Sondrel Ltd in 2017, again as an ASIC Verification Engineer (Contractor). In 2020, they returned to Imagination Technologies as an ASIC Verification Engineer (Contractor). Ian is currently working at AccelerComm Ltd as a Senior Verification Engineer since 2022.

Ian W. obtained a BEng(hons) in Electronic Engineering from the University of Southampton between 1987 and 1990. In 1998, they obtained a Chartered Engineer, CEng certification from the Engineering Council.