Colin Thomas

Colin Thomas has over 35 years of experience in engineering. Colin began their career in 1984 as a Development Engineer at GEC, where they worked in the VLSI Process Research Lab (VPRL) and focused on Silicon on Sapphire process development, implant modelling, and spice parameter extraction. In 1985 they joined Digital Equipment Corporation as a Senior Engineer, where they developed and worked on simulation flows for PDP and MicroVAX2 systems, and introduced new software and methodologies. Colin then moved to Texas Instruments in 1989, where they were a Senior Member Technical Staff and the main architect and implementer of a complete ASIC environment for 0. In 2000 they joined IN 2 FAB as a Principal Engineer, where they designed and developed methodology for migrating std cell designs between processes and foundries. In 2006 they joined CSR as a Principal Engineer, where they developed DFM (Design For Manufacture) methodologies and flows at 40nm and below, and worked on physical defects with ATPG and fast litho techniques. In 2015 they joined Qualcomm Cambridge as a Principal Engineer, where they worked closely with Mentor Graphics cell aware R&D group to develop physical links from Critical Area Analysis to fault probability in ATPG, and with Cadence R&D on Squish pattern techniques. In 2021 they joined Agile Analog as an EDA/CAD Principal Design Engineer.

Colin Thomas attended Durham University from 1980 to 1983, during which time they obtained a 2.1 Hons in Applied Physics & Electronics. Colin then returned to Durham University from 1983 to 1984 to pursue a BSC Hons in Postgraduate studies on Ion Sensitive FETs.