Gregoire Avot

Gregoire Avot worked as a Principal Software Engineer at Arteris starting in June 2008. Gregoire also held the position of Senior Software Engineer at Magillem Design Services starting in June 2008. In this role, they were responsible for the specification, realization, and deployment of advanced hierarchical connectivity tools on the Ip-xact database. Gregoire participated in the Accelera Extension Working Group for Power and AMS extensions. Prior to this, they worked as an Engineer at Avertec from March 2002 to June 2008. In this role, they focused on timing modeling for the static timing analyzer HiTAS, including RC delays using AWE on large networks, interconnect crosstalk effect on timings and signal integrity, and creating a very fast analytical timing model for gates described at the transistor level.

Gregoire Avot earned a PhD in Computer Science from LIP6, a school they attended from 1992 to 2002.