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Nour-Eddine Boudallaa

Verification Engineer at Arteris

Nour-Eddine Boudallaa has a diverse work experience in various organizations. Nour-Eddine started working at Arteris in 2022 as a Verification Engineer, where they are currently employed. As part of their role, Nour-Eddine has developed a C++ standalone app using the FST API for waveform debugging, extended GTKWave for RTL hardware debug, and built a C++ plug-in in the UVM environment for transaction debugging.

Prior to that, Nour-Eddine worked at CNRS - Centre national de la recherche scientifique as a Research Collaborator from September 2020 to April 2021. Nour-Eddine also completed a Graduation Internship at CNRS from March 2020 to September 2020.

In 2019, Nour-Eddine had a Technical Internship at IRESEN - Institut de Recherche en Énergie Solaire et Énergies Nouvelles for two months.

Furthermore, in 2018, Nour-Eddine undertook an Observation Internship at OCP SA for a duration of one month.

Overall, Nour-Eddine has gained expertise in verification engineering, waveform debugging, RTL hardware debugging, and transaction debugging through their work experience at various organizations.

Nour-Eddine Boudallaa's education history begins with completing a Master 2 degree in Embedded Systems and Information Processing at Université Paris-Saclay from 2021 to 2022. Prior to that, from 2015 to 2020, Nour-Eddine attended École Nationale des Sciences Appliquées de Marrakech, where they obtained an Ingénieur d'état degree in Embedded Electronic Systems and Systems Control.

In addition to their formal education, Nour-Eddine has also acquired certifications to enhance their skills and knowledge. In October 2022, they obtained a certification in VLSI System On Chip Design from Maven Silicon. Nour-Eddine also completed a certification in Verification Methodology Overview from the same institution in the same month and year.

Links


Timeline

  • Verification Engineer

    September, 2022 - present

  • Graduation Internship

    March, 2022