Sharon Checheanovsky

Sharon Checheanovsky has a strong background in post silicon validation engineering. Sharon worked at Marvell Semiconductor for 13 years, where they gained extensive experience working on complex SoCs and implementing drivers for various interfaces such as ARM, PCIe, USB, I2C, SATA, LVDS, DMA, and XOR. Sharon then joined Intel Corporation in 2016 and served as a post silicon validation engineer, leading the "intel CVG team" in designing, implementing, and maintaining the team's SDK and operation-system. Sharon also worked on coding drivers, testing, and debugging for high-speed interfaces such as CPU MIPS, arch, cache, PCIe, and timers. After that, they joined Mobileye in 2022 as a part of the post silicon validation team. There, they led the team in post silicon activation and worked on high-speed interfaces such as PCIe GEN5 and CPU RISC5. Sharon is currently working at Astera Labs as a Validation Engineer, starting in 2023.

Sharon Checheanovsky attended Braude Academic College, but no specific details about the degree name or field of study are available.