Abhishek Maringanti

Abhishek Maringanti is currently a Senior Engineer at Axelera AI, specializing in Silicon Logic Design. Prior to this, Abhishek held the role of Staff Digital Design Engineer at Qualcomm, where Abhishek served as an IP Design Lead. With experience at companies such as Cerium Systems, Cadence Design Systems, Wafer Space, Marvell India Pvt Ltd, and Redpine Signals, Abhishek has a strong background in design engineering and delivering high-quality IP modules to customers and internal teams. Abhishek holds a Master's degree in Advanced Microelectronic Systems Engineering from the University of Bristol and a BTech in Electronics and Communication from the National Institute of Technology Karnataka.