Leonidas Katselas

Senior DFT Engineer at Axelera AI

Leonidas Katselas began their career in 2014 as an Internship at CERTH - ITI. Leonidas then moved on to become a PhD Candidate at Aristotle University of Thessaloniki in the same year. In 2018, they joined u-blox as an IC DfT Engineer and also took on an Engineer Internship at imec. In 2021, they became a Senior DFT Engineer at Axelera AI.

Leonidas Katselas obtained an Engineering Diploma in Electrical and Computer Engineering from Aristotle University of Thessaloniki (AUTH) between 2008 and 2014. Leonidas also holds certifications from Cadence Design Systems for Genus Synthesis Solution with Stylus Common UI (obtained in June 2019), Mentor for Tessent TestKompress and Advanced Topics (obtained in May 2019) and Encounter RTL Compiler v14.1 (iLS).

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Timeline

  • Senior DFT Engineer

    September, 2021 - present