Bhoomika Srinath

ASIC Design Verification Engineer at BrainChip

Bhoomika Srinath's work experience includes being an ASIC Design Verification Engineer at BrainChip since 2022, an ASIC Design Engineer at Cyient from 2021 to 2022, and an ASIC Design and Verification intern at Maven Silicon from 2020 to 2021.

Bhoomika Srinath completed their Bachelor's degree in Electronics and Communications Engineering from Visvesvaraya Technological University from 2016 to 2020. Bhoomika has obtained several additional certifications including ModelSim/Questa Core HDL Simulation, SystemVerilog UVM, SystemVerilog for Verification, UVM Intermediate, Visualizer, ASIC design and verification Engineering, and Galactic problem solver from various institutions such as Siemens Digital Industries Software and Maven Silicon. The certifications were obtained between the years 2019 and 2021.

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Previous companies

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Timeline

  • ASIC Design Verification Engineer

    December, 2022 - present

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