Dongxiang Wu

Dongxiang Wu is a highly experienced professional in the field of computer science and technology, with a strong focus on emulation and logic synthesis. Currently serving as the Sr. Group Director of R&D at Cadence Design Systems since May 2017, Dongxiang has led initiatives in Emulation Compiler Technologies. Prior roles include Architect at Mentor Graphics, specializing in logic synthesis and optimization, and Principal Engineer at Tabula, where expertise in Logic Synthesis was further developed. Dongxiang's career began at Synopsys Inc, where responsibilities included managing RTL synthesis and optimization as a Sr. R&D Manager. Academic credentials include a Master of Science in Computer Science from the University of North Carolina at Chapel Hill and a Bachelor of Science in Computer Science and Technology from Tsinghua University.