Chetana Tumuluri

FPGA Design Validation - Team Lead at Cerium Systems

Chetana Tumuluri has a strong background in FPGA design engineering. chetana started their career in 2011 as an FPGA Design Engineer at ICOMM Tele Limited, where they gained experience in FPGA programming and worked with Xilinx FPGA devices such as Spartan3, Spartan6, and Kintex7. chetana also developed knowledge in timing closure and static timing analysis. In 2014, Chetana joined CMC LTD as an FPGA Design Engineer before moving on to Tata Consultancy Services in 2015, where they worked as an FPGA Design Engineer until 2022. Currently, they are the Team Lead for FPGA Design Validation at Cerium Systems.

Chetana Tumuluri pursued their education in a chronological manner as follows. From 2008 to 2011, they attended Sri Nidhi Institute of Science and Technology, JNTU, Hyderabad, where they obtained a Master's degree in Digital Systems. Prior to that, from 2004 to 2008, they studied at Aurora's Technological and Research Institute, attaining a Bachelor's degree in Electronics and Communications Engineering. Chetana Tumuluri's education history also includes attending Narayana junior college, Hyderabad from 2002 to 2004 for their Intermediate studies, specializing in Maths, Physics, and Chemistry. Their secondary education was completed at Sri Aurobindo International School from 2001 to 2002, where they received their SSC degree.

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  • FPGA Design Validation - Team Lead

    June, 2022 - present

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