Sakthivel Murugan

Sakthivel Murugan is a seasoned Senior Analog Design Engineer at Cerium Systems, where involvement in LPTX, LPRX, and LPCD for MIPI DPHY has been prominent since November 2016. Prior to this role, Sakthivel served as an Analog Circuit Design Engineer at Adventura Technologies (India) Pvt Ltd. from October 2010 to November 2016, focusing on PLL and CDR designs across various technologies including 40nm, 28nm, 130nm, 65nm, and 90nm. Sakthivel holds a Bachelor of Engineering (B.E.) degree in Electronics and Communication Engineering from Sardar Raja College of Engineerings, completed between 2005 and 2009.