Daniele Buglione

Daniele Buglione is an experienced project leader in the electronics and telecommunications field, currently serving as a Project Leader at Comelit Group S.p.A. since April 2019. Prior to this role, Daniele held the position of Electronic Hardware & Validation Manager at Gewiss from April 2008 to March 2019, where responsibilities included overseeing R&D electronic teams and managing projects from definition to testing gates. Additionally, Daniele acted as Project Leader and hardware engineer for a digital audio and video entry phone system, ensuring compliance with current regulations. Daniele began a career as a Firmware & Hardware Engineer with SELEX Communications from May 2002 to March 2008, specializing in analog and digital hardware design using DSP and FPGA components. Daniele holds a degree in telecommunications engineering from Politecnico di Milano, obtained between 1995 and 2001.