Jai Gopal Pandey

Senior Principal Scientist at CSIR-CEERI

Jai Gopal Pandey, a Senior Principal Scientist at CSIR-CEERI, has a strong background in high-performance embedded systems and FPGAs for cryptography and image/video processing applications. With previous experience as an Asst. Professor at Indraprastha Engineering College, Jai holds a Ph.D. in Electrical and Electronics Engineering from Birla Institute of Technology and Science, Pilani. Jai Gopal's expertise in electronic design and technology, combined with their educational background, make him a valuable asset in the field.

Location

Rajgarh, India

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CSIR-CEERI

Central Electronics Engineering Research Institute (CEERI), Pilani, is a pioneer Research Institute in the Country and a constituent laboratory of Council of Scientific and Industrial Research (CSIR), New Delhi, established in 1953, for advanced Research and Development (R&D) in the field of Electronics. Since its inception it has been working for the growth of electronics in the country and has established the required infrastructure and well experienced manpower for undertaking R&D in Electronics.


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Headquarters

Pilani, India

Employees

201-500

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