Aayush Ankit

Principal AI Hardware Architect at d-Matrix

Aayush Ankit began their career in 2013 as a Summer Research Internship at Hanyang University, where they worked on Pedestrian Detection Algorithms for use in Automatic Driver Assistance Systems. In 2014, they held an MITACS Globalink Research Internship at the University of Alberta, where they developed a novel hybrid FPGA based implementation for the Nuclei detection technique. In 2015, they were a Graduate Research Assistant and Teaching Assistant at Purdue University. In 2017, they held a CPU Design Intern position at Intel Corporation, where they worked on designing Next-Generation Intel processors. Aayush also held a Research Associate position at Hewlett Packard Enterprise, where they worked on designing a machine learning inference accelerator using hybrid CMOS-memristive technology. In 2019, they were a GPU Architect Intern at Samsung SARC | ACL. In 2020, they became a Senior Researcher, AI and Advanced Architectures at Microsoft, where they worked on framework and optimizations for distributed training, data, tensor and pipeline parallelisms, MoE profiling and techniques for efficient inter-device communication, and programming model and high-performance kernels for DL accelerators. Aayush Ankit is currently a Principal AI Hardware Architect at d-Matrix.

Aayush Ankit obtained a B.Tech. in Electronics Engineering from the Indian Institute of Technology (Banaras Hindu University), Varanasi between 2011 and 2015. Aayush then went on to pursue a Doctor of Philosophy - PhD in Electrical and Computer Engineering at Purdue University from 2015 to 2020. Aayush also obtained certifications in Machine Learning from Coursera in October 2012, Circuits and Electronics from edX in September 2012, and an edX Honor Code Certificate for Introduction to Computer Science and Programming Using Python.

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Timeline

  • Principal AI Hardware Architect

    October, 2022 - present