Rakesh Patel

Rakesh Patel has worked in the technology industry since 2011. Rakesh began their career at Intel Corporation, where they held the roles of Emulation Engineer, SOC Design Engineer, and Emulation Engineer. In their role as Emulation Engineer, they were responsible for leading the Emulation Model Build, syncing up with the validation team leads to understand their needs and schedule, and scoping out the emulation model build and feature enabling schedule. Rakesh was also responsible for delivering the SOC emulation model on time to help the validation team to meet their goals. This involved model compiling and debugging basic test failures, as well as supporting the validation team to debug emulation regression/environment failures. Rakesh also worked closely with the testbench developer to implement emulation friendly code and worked on reconstruction of testbench/BFM to enable virtual platforms on emulation models. In 2022, Rakesh Patel began working at d-Matrix as a Sr. Staff Emulation Design Engineer.

Rakesh Patel attended California State University-Sacramento from 2008 to 2010. Rakesh then went on to earn their M.S in Electronics and Electrical Engineering from California State University. Finally, they completed their B.E in Electronics Engineering from Pune University.