Noam Gallmann

ML Hardware Design And Verification Engineer at Daedalean

Noam Gallmann is currently serving as an ML Hardware Design and Verification Engineer at Daedalean AI since May 2021. Prior experience includes a role as a Research Assistant at the Integrated Systems Laboratory, ETH Zurich from July 2020 to May 2021, and the development of a master thesis focused on the Ibex RISC-V CPU core at lowRISC CIC and ETH Zurich from January to July 2020. Additionally, Noam contributed to FPGA-based embedded communication devices during a semester thesis at duagon AG and ETH Zurich in early 2019 and completed a bachelor thesis on electronic vision stabilization algorithms at the Institute of Neuroinformatics, University of Zurich and ETH Zurich in late 2015. Noam holds a Master's degree in Interdisciplinary Sciences and a Bachelor's degree in the same field from ETH Zürich, as well as an Assessment Year in Mechanical Engineering at the same institution.

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