Foong Tek Chan

Foong Tek Chan has worked in the IC design engineering field since 2005. From 2005 to 2013, they were a Member of Technical Staff at Altera, where they led and executed various 20nm IP development and chaired a 20nm IP methodology task force. Foong Tek also lead and executed 28nm IO IP development, characterization and productization support. From 2013 to 2017, they were a Senior Member of Technical Staff at BaySand Inc, where they defined and developed low power metal configurable standard cells for 28nm FDSOI process and ran standard cells characterization to generate timing lib. Foong Tek also developed 28nm configurable general purpose IO and PLL design. In 2017, they became an IC design engineer at Efinix, Inc.

Foong Tek Chan attended Multimedia University from 2000 to 2005, where they earned a Bachelor of Electronics in Telecommunications Engineering.