David Aceves

David Aceves has a long history of experience in design and verification engineering. In 2021, they began working as a Senior Design Verification Engineer at Everspin Technologies. Prior to this, they were a Design Verification Engineer at Sankalp Semiconductor from 2018-2021. From 2000-2018, they worked as a Design Verification Engineer at NXP (formerly Freescale and Motorola), where they were responsible for identifying, planning, and executing on a verification plan for a module level and a SOC level testbench. David also collaborated with designers in debugging RTL code for a module and SOC, and consulted with Test Engineers to debug tester and production patterns on a SOC. Before this, from 1997-2000, they worked as a Design and Verification Engineer at Eureka Software, where they collaborated with design, verification, and test engineers for Motorola M*Core Family 32-bit microcontrollers. David simulated and debugged testcases on the M*Core Family 32-bit microcontrollers, and created testcases for ADC and ROM modules that were integrated on 32-bit microcontrollers.

David Aceves has a Bachelor's Degree in Electrical and Electronics Engineering from The University of Texas at San Antonio.