Juan José García-Castro Crespo

Juan José García-Castro Crespo is a Senior Engineer at Arm Ltd., specializing in the DynamIQ Shared Unit (DSU) L3 memory system and DynamIQ cluster, with responsibilities including internal transport topology performance evaluation and routing algorithm design. Prior experience includes serving as a Research Associate and Teaching Assistant at Universidad de Castilla-La Mancha, focusing on network dynamic reconfiguration for high-performance computing (HPC) systems and instructing courses on computer structure and architecture. An internship at iTEAM involved C++ modeling and characterization of on-chip silicon photonic devices. Juan José holds a PhD and an M.S. in Computer Science, as well as a Bachelor's degree in Computer Engineering from Universidad de Castilla-La Mancha, and completed Bachillerato studies in Sciences and Technology at Athlone Community College.