Pradyumna Katageri

Pradyumna Katageri is a skilled design verification engineer with extensive experience in the technology sector. Currently working as a Design Verification Engineer at Excelmax Technologies and a Design Verification Consultant at MediaTek since November 2022, Pradyumna has previously held positions at Western Digital as a Verification & Python Automation Consultant and at InSemi Technologies Pvt. Ltd. as an Associate Verification Engineer. Notably, during the tenure at Western Digital, significant contributions included maintaining and improving automation processes that dramatically reduced testing efforts. Pradyumna began at Maven Silicon as an Advanced RTL Design and Verification Trainee. Educational credentials include a Bachelor of Engineering in Electronics and Communication Engineering from Sir M Visvesvaraya Institute of Technology, complemented by ongoing professional development at Scaler.