Kartika Chamarti

RTL Design Engineer at Faststream Technologies

Kartika Chamarti started their work experience in 2016 as an intern at Electronics and Radar Development Establishment (LRDE) where they worked on their final year undergraduate project. The project focused on RADAR waveform generation using FPGA, specifically in the context of a dual pulse dual band coastal surveillance RADAR. Their responsibilities included generating timing signals, control signals, and RADAR waveforms using P4 coded sequence.

In 2022, Kartika joined Faststream Technologies as a Design Verification Engineer. No specific start or end dates are provided for this role.

Kartika Chamarti obtained a Bachelor's Degree in Electronics and Communications Engineering from PESIT between the years 2012 and 2016. Following that, they pursued a Masters degree in Electrical and Computer Engineering from the University of Minnesota, completing their studies in 2018.

Links

Timeline

  • RTL Design Engineer

    December 1, 2022 - present

  • Design Verification Engineer

    October, 2022