PJ

Paritosh Joshi

Senior Director ASIC Verification at Fungible

Paritosh Joshi has a solid background in the field of ASIC verification, with over 20 years of experience. Paritosh currently holds the position of Senior Director, ASIC Verification at Fungible, Inc. Paritosh joined the company in 2017 as a Director, ASIC Verification and was promoted to their current role in March 2022.

Prior to their current position, Paritosh worked at Infinera in various roles. From 2015 to 2017, they served as a Senior Manager in the ASIC Group. Before that, they were at ARM as a Principal Verification Engineer from 2013 to 2014.

Paritosh's experience also includes their time at Infinera as a Senior Manager in the ASIC Group from 2012 to 2013. Paritosh worked at Juniper Networks from 2008 to 2012 as a Verification Lead.

Before joining Juniper Networks, Paritosh was a Lead Design Verification Engineer at Montalvo Systems from 2007 to 2008. Paritosh began their career at Intel as a Technical Lead from 2001 to 2007.

Overall, Paritosh Joshi has a diverse range of experience in the field of ASIC verification, with a proven track record of leadership and expertise in the industry.

Paritosh Joshi pursued their M.Tech. degree in CEDT (Centre for Electronics Design and Technology) from 1999 to 2001 at the Indian Institute of Science (IISc).

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Timeline

  • Senior Director ASIC Verification

    March, 2022 - present

  • Director ASIC Verification

    September, 2017