Giorgos Latmos is a Verification Engineer at HDL Design House, where Giorgos specializes in SoC Verification using UVM and SystemVerilog. Giorgos also has experience as a Firmware Engineer, developing Python scripts for various applications and creating Bare-Metal C API for different peripherals. Prior to their current role, Giorgos served in the Greek Army as a Presidential Guard and worked as a Software Developer at BETA CAE Systems. Giorgos holds a Master's degree from Aristotle University of Thessaloniki and is currently pursuing further education at Ghent University.
January, 2023 - present
March, 2021