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George Chen

Principal Engineer, SOC Logic Design at Intel

George Chen is a seasoned engineering professional with extensive experience in hardware and software design roles within leading technology companies. Currently serving as a Principal Engineer at Intel Corporation since March 2024, George previously held a Senior Principal Engineer position at Rapid Silicon, where responsibilities included device modeling methodology and RTL changes for IO subsystems. George's career at Intel spanned from December 2015 to May 2023, focusing on hardware-software co-design for FPGA products. Earlier roles included leadership in timing methodology at Altera and various engineering positions within Oracle and Sun Microsystems, emphasizing EDA tool architecture and static timing analysis. George holds a Bachelor of Science degree from Caltech and both a Master's and Doctorate in Electrical Engineering from Stanford University.

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Previous companies

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Peers

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Timeline

  • Principal Engineer, SOC Logic Design

    March, 2024 - present

  • SOC Design Engineer

    December, 2015