Associate FPGA Engineer

JMA makes 5G possible for organizations with the most critical connectivity demands in the world. From its global tech centers, JMA is ushering in a new era of connectivity for leading mobile carriers, the most iconic stadiums, major universities, leading healthcare facilities, and the busiest transit centers.   5G is more than another G on your phone — it is a generational opportunity to change the way the world operates. Join the industry’s fastest growing technology company to shape that future today.

An associate FPGA Engineer with a focus on FPGA for wireless applications. Successful candidate will contribute to designing and optimizing FPGA solutions that are integrated into cutting-edge wireless technologies and will play an important role in advancing our FPGA capabilities, contributing to the development of wireless cellular systems.

The Associate FPGA Engineer will be located in the JMA offices in Bologna, Italy in the Castel San Pietro Terme area.

Responsibilities

• Participate in full-cycle of FPGA development - write FPGA specification, micro-architect, design, verification, optimization and testing FPGA features for wireless communication systems on JMA HW/FPGA platforms.
• Implement FPGA designs focusing on ensuring optimal performance and resource reuse between the products.
• Execute verification framework to ensure the reliability and functionality of FPGA RTL code.
• Collaborate with hardware and Firmware teams to integrate FPGA design into larger wireless systems.
• Execute comprehensive test plans to validate the functionality and performance of FPGA blocks.
• Support development of FPGA modules for wireless communication protocols, such as LTE, 5G, ORAN fronthaul.
• Work with Firmware team to integrate FPGA into HW products.
• Maintain the detailed documentation for FPGA designs.
• Maintain version-controlled documentation to facilitate collaboration and knowledge transfer.
• Stay abreast of industry trends and emerging technologies in wireless field.
• Explore and recommend new tools, methodologies, and techniques to enhance FPGA development processes.

Qualifications

• Minimum of 1 year of experience in FPGA design, with a specific emphasis for wireless applications.
• Knowledge of RTL optimized design technique in digital and DSP domain with Verilog/SystemVerilog and/or VHDL.
• Experience with FPGA design tools such as Vivado, Quartus, and simulation tools, including code linter.
• Knowledge of FPGA’s synthesis, place-n-route process, and optimization for timing closure.
• Familiar with FPGA interfaces – 10/25GbE, ADC/DAC, uART, SPI, I2C, DDR4, JESD204B, PCIe
• Ability to write module-level and/or top-level FPGA testbench with testcases to ensure the design coverage in simulation.
• Lab troubleshooting skills - mastering the lab set up, equipment and leveraging FPGA’s chipscope (or signaltap) debug tool.
• Knowledge of Python scripting language and familiar with bitbucket, Jira-based workflow is plus.
• Some familiarity with wireless communication protocols (e.g., LTE, 5G) and their FPGA implementation.
• Some knowledge of RF systems and signal processing challenges in wireless communication.
• Strong analytical skills with the ability to troubleshoot and optimize FPGA solutions.
• Ability to work collaboratively in a cross-functional team environment.
• Excellent communication skills with the ability to convey complex technical concepts to both technical and non-technical stakeholders.
• English language is an asset.